Catapult AI NN is a comprehensive solution that helps software engineers synthesize AI neural networks. Software development teams can seamlessly convert AI models designed in Python to silicon-based
implementations, facilitating faster and more energy-efficient execution compared to standard processors.
Siemens Digital Industries Software has introduced Catapult™ AI NN software for high-level synthesis (HLS) of neural network accelerators on application-specific integrated circuits (ASICs) and system-on-
chip (SoCs). Catapult AI NN is a comprehensive solution that takes neural network descriptions from AI frameworks, converts them into C++ code, and synthesizes them into RTL accelerators in Verilog or
VHDL for implementation in silicon.
Catapult AI NN integrates hls4ml, an open source software package for machine learning hardware acceleration, and Siemens Catapult™ HLS software for high-level synthesis. Developed in collaboration with
the U.S. Department of Energy’s Fermilab and other organizations contributing to hls4ml, Catapult AI NN meets the unique power, performance, and area (PPA) requirements of machine learning accelerator
designs for custom silicon.
"The handoff process of neural network models and their manual conversion to hardware implementation is inefficient, time-consuming and error-prone, especially when creating and verifying hardware accelerator
variants tailored for specific performance, power and area," said Mo Movahed, vice president and general manager of high-level design, verification and power at Siemens Digital Industries Software. "We are able to
create more possibilities for AI/ML software engineers by enabling scientists and AI experts to take advantage of industry-standard AI frameworks (such as neural network model design) and seamlessly integrate
these models into PPA-optimized hardware designs. With Siemens' new Catapult AI NN solution, developers can automatically implement neural network models during software development while performing
PPA optimization, effectively improving AI development efficiency and accelerating innovation."
As runtime AI and machine learning tasks migrate from data centers to consumer appliances, medical devices and other fields, customer demand for right-sized AI hardware is also growing rapidly to reduce power
consumption, reduce costs and achieve end-product differentiation. However, most machine learning experts are more comfortable working with tools like TensorFlow, PyTorch, or Keras than synthesizable C++,
Verilog, or VHDL. In the past, there was no easy way for AI experts to accelerate machine learning applications in right-sized ASIC or SoC implementations. The hls4ml initiative aims to help bridge this gap by
generating C++ code from neural network descriptions in AI frameworks like TensorFlow, PyTorch, or Keras. This C++ code can then be deployed for FPGA, ASIC, or SoC implementations.
Catapult AI NN extends the capabilities of hls4ml to ASIC and SoC designs, including a library of specialized C++ machine learning functions tailored for ASIC design. Using these capabilities, designers can
optimize PPA by making latency and resource tradeoffs between various C++ code implementations. In addition, designers can now evaluate the impact of different neural network designs to determine the
ideal neural network architecture for hardware.
“Particle detectors have very tight constraints for edge AI,” said Panagiotis Spentzouris, director of emerging technologies at Fermilab. “We worked with Siemens to develop Catapult AI NN, a comprehensive
framework that leverages the expertise of our scientists and AI experts, even if they are not ASIC designers. It is also very usable by experienced hardware experts.”
Catapult AI NN is available now to early adopters
